1. Field of the Invention
The invention relates generally to semiconductor structures. More particularly, the invention relates to multi-component integration schemes within semiconductor structures.
2. Description of the Related Art
In addition to transistors, diodes and capacitors, semiconductor structures also often include fuses, anti-fuses and resistors. Fuses and anti-fuses within semiconductor circuits are often intended as option selecting devices. For example, such fuses or anti-fuses may be severed or fused (i.e., programmed) to provide for substitution of an inoperative portion of a semiconductor circuit with a redundant operative portion of the semiconductor circuit. In contrast, resistors within semiconductor structures are typically intended as load bearing elements or resonant frequency determining elements within semiconductor circuits.
While each of the foregoing electrical components is desirable and under certain circumstances essential within semiconductor circuits, nonetheless efficient fabrication of semiconductor structures that include a plurality of the foregoing electrical components is not entirely without problems. In particular, integration of multiple of the foregoing components into a single semiconductor structure often provides for design and manufacturing difficulties.
Various semiconductor structures and materials compositions having desirable properties, and methods for fabricating those semiconductor structures or using those materials compositions, are known in the semiconductor fabrication art.
For example, Tao, in “Electromigration Characteristics of TiN Barrier Layer Material,” IEEE Electron Device Letters, Vol. 16(6), June 1995, teaches failure mechanism characteristics of titanium nitride as a barrier layer within multilayer metallization structures. In particular, Tao teaches an absence of electromigration as a failure mechanism for a titanium nitride barrier layer, and rather that electrical failure is due to a purely thermally activated process.
In addition, Ueda et al., in “A Novel Cu Electrical Fuse Structure and Blowing Scheme utilizing Crack-assisted Mode for 90-45 nm-node and beyond,” IEEE 2006 Symposium on VLSI Technology Digest of Technical Papers, teaches a copper based e-fuse that uses a crack-assisted severing mode rather than an electromigration severing mode. Since the copper based e-fuse uses a material independent of a gate material, the copper based e-fuse is readily extendible to advanced generations of integrated circuits.
Further, Wright in U.S. Pat. Nos. 5,966,597 and 6,236,094 teaches a low resistance gate electrode within a semiconductor structure that results from partial replacement of a polysilicon gate electrode (i.e., replacement of an upper portion of the polysilicon gate electrode) with a metal within the semiconductor structure. The resultant metal capped polysilicon laminated gate electrode has improved electrical conductivity in comparison with a purely polysilicon gate electrode or a silicide capped polysilicon gate electrode.
Finally, Ahn in U.S. Pat. Nos. 6,852,167 and 7,160,577, teaches a chemical vapor deposition method, system and apparatus, that more specifically may include an atomic layer chemical vapor deposition method, system and apparatus, that in turn may be used for forming a layer such as but not limited to an aluminum oxide layer, within a semiconductor structure. The particular chemical vapor deposition method, system and apparatus, as taught, efficiently and economically provides the layer with enhanced uniformity.
Semiconductor device and semiconductor structure dimensions are certain to continue to decrease and semiconductor device and semiconductor structure integration levels are certain to increase, as semiconductor circuit functionality requirements increase. Thus, desirable are semiconductor structures, and methods for fabricating those semiconductor structures, that provide the semiconductor structures with enhanced integration of individual semiconductor device components, with enhanced manufacturability.